1. Field of the Invention
The present invention relates to display devices, and more particularly, to a current-driven self-luminous display device using an organic electroluminescence (EL) element or the like. The present invention sets the gate voltage and the source potential of a transistor for driving a light-emitting element to predetermined fixed potentials so that a variation in luminous intensity caused by a variation in a threshold voltage of the transistor can be corrected, and the source of the transistor is set to have the fixed potential from a signal line SIG. Thus, compared with the related art, a reduced number of scanning lines and a reduced number of wiring patterns for fixed potentials can be achieved.
2. Description of the Related Art
Concerning display devices using organic EL elements, technologies described, for example, in U.S. Pat. No. 5,684,365 and Japanese Unexamined Patent Application Publication No. 8-234683 have been suggested.
FIG. 14 is a block diagram showing a so-called active-matrix-type display device using an organic EL element of the related art. In a display device 1, a pixel area 2 includes a plurality of pixels PX 3 arranged in a matrix. In the pixel area 2, for the pixels 3, which are arranged in a matrix, scanning lines SCN are provided in a horizontal direction for individual lines, and signal lines SIG are provided for individual columns so as to intersect the scanning lines SCN.
As shown in FIG. 15, each of the pixels 3 includes an organic EL element 8, which is a current-driven self-luminous light-emitting element, and a driving circuit (hereinafter, referred to as a “pixel circuit”) for driving the organic EL element 8.
In the pixel circuit, one end of a signal-level holding capacitor C1 is held at a constant potential and the other end of the signal-level holding capacitor C1 is connected to a signal line SIG through a transistor TR1, which is turned on and off in accordance with a write signal WS. Thus, in the pixel circuit, the transistor TR1 is turned on in accordance with the rising of the write signal, the potential of the other end of the signal-level holding capacitor C1 is set to the signal level of the signal line SIG, and the signal level of the signal line SIG is sampled and held by the other end of the signal-level holding capacitor C1 at a time when the on-state transistor TR1 is turned off.
In the pixel circuit, the other end of the signal-level holding capacitor C1 is connected to the gate of a P-channel transistor TR2, the source of which is connected to a power supply Vcc, and the drain of the transistor TR2 is connected to the anode of the organic EL element 8. The pixel circuit is set such that the transistor TR2 operates in a saturation region. As a result, the transistor TR2 forms a constant-current circuit exhibiting a drain-source current Ids, which is represented by expression (1). Here, “Vgs” represents the gate-source voltage of the transistor TR2, and μ represents the mobility. In addition, “W” represents a channel width, “L” represents a channel length, “Cox” represents a gate capacitance, and “Vth” represents a threshold voltage of the transistor TR2. Thus, in each of the pixel circuits, the organic EL element 8 is driven in accordance with a driving current Ids, which corresponds to the signal level of the signal line SIG sampled and held by the signal-level holding capacitor C1.
                    Ids        -                              1            2                    ×          μ          ×                      W            L                    ×          Cox          ×                                    (                              Vgs                -                Vth                            )                        2                                              (        1        )            
In the display device 1, a write scan circuit (WSCN) 4A of a vertical driving circuit 4 sequentially transfers predetermined sampling pulses to generate write signals WS, which are timing signals for indicating writing to the pixels 3. In addition, a horizontal selector (HSEL) 5A of a horizontal driving circuit 5 sequentially transfers predetermined sampling pulses to generate timing signals, and sets each of the signal lines SIG to have the signal level of an input signal S1 in accordance with a corresponding timing signal. Thus, the display device 1 sets, dot sequentially or line sequentially, the terminal voltage of the signal-level holding capacitor C1 provided in each of the pixels 3 in accordance with the input signal S1, and displays an image based on the input signal S1.
As shown in FIG. 16, the current-voltage characteristic of the organic EL element 8 changes with time in a direction in which the flow of current becomes restricted as the usage time increases. Referring to FIG. 16, “L1” represents an initial characteristic and “L2” represents a characteristic that changes with time. However, in a case where the organic EL element 8 is driven by the P-channel transistor TR2 in the circuit configuration shown in FIG. 15, since the organic EL element 8 is driven by the transistor TR2 in accordance with the gate-source voltage Vgs, which is set on the basis of the signal level of the signal line SIG, a change in the luminous intensity of a pixel that can be caused by a change in the current-voltage characteristic with time is prevented.
If all the transistors in the pixel circuits, the horizontal driving circuit, and the vertical driving circuit are of a N-channel type, all the circuits can be formed together on an insulating substrate, such as a glass substrate, by an amorphous-silicon process. Thus, a display device can be produced easily.
However, as shown in FIG. 17, which is provided for comparison with FIG. 15, in a case where a N-channel transistor is used as a transistor TR2 forming each of a plurality of pixels 13 and a display device 11 includes a pixel area 12 including such pixels 13, since the source of the transistor TR2 is connected to the organic EL element 8, the gate-source voltage Vgs of the transistor TR2 changes in accordance with a change in the current-voltage characteristic shown in FIG. 16. Thus, in this case, as the usage time increases, the current flowing to the organic EL element 8 gradually decreases, and the luminous intensity of each of the pixels gradually decreases. In addition, with the configuration shown in FIG. 17, the luminous intensity varies depending on the pixel in accordance with a variation in the characteristic of the transistor TR2. The variation in the luminous intensity disrupts the uniformity of the display screen, and such a variation is perceived as unevenness and roughness of the display screen.
Thus, in order to prevent a reduction in luminous intensity from being caused by such a change of an organic EL element with time and to prevent a variation in luminous intensity from being caused by a variation in a characteristic of a transistor, the configuration shown in FIG. 18 has been suggested.
In a display device 21 shown in FIG. 18, a pixel area 22 includes a plurality of pixels 23 arranged in a matrix. In each of the pixels 23, one end of the signal-level holding capacitor C1 is connected to the anode of the organic EL element 8 and the other end of the signal-level holding capacitor C1 is connected to a signal line SIG through the transistor TR1, which is turned on and off in accordance with a write signal WS. Thus, the voltage at the other end of the signal-level holding capacitor C1 is set to the signal level of the signal line SIG in accordance with the write signal WS.
In the pixel 23, the ends of the signal-level holding capacitor C1 are connected to the source and the gate of the transistor TR2, and the drain of the transistor TR2 is connected to a power supply Vcc through a transistor TR3, which is turned on and off in accordance with a driving-pulse signal DS. Thus, in the pixel 23, the transistor TR2, which has a source-follower circuit configuration in which the gate potential of the transistor TR2 is set to the signal level of the signal line SIG, drives the organic EL element 8. Here, “Vcat” represents the cathode potential of the organic EL element 8. In addition, the driving-pulse signal DS serves as a timing signal for controlling a light-emission period of the pixel 23. A drive scan circuit (DSCN) 24B sequentially transfers predetermined sampling pulses to generate timing signals.
In addition, in the pixel 23, the ends of the signal-level holding capacitor C1 are connected to predetermined fixed potentials Vofs and Vss through transistors TR4 and TR5, which are turned on and off in accordance with control signals AZ1 and AZ2, respectively. Control-signal generation circuits 24C and 24D provided in a vertical driving circuit 24 sequentially transfer predetermined sampling pulses to generate the control signals AZ1 and AZ2, which serve as timing signals.
FIG. 19 is a timing chart of a single pixel 23 in the display device 21. In FIG. 19, symbols representing transistors that are turned on and off in accordance with corresponding signals are represented together with the corresponding signals. As shown in FIG. 20, in a light-emission period T1 where the organic EL element 8 emits light, in the pixel 23, a write signal WS and control signals AZ1 and AZ2 exhibit a low level (see parts (A) to (C) of FIG. 19) so that the transistors TR1, TR4, and TR5 are set to be off, and a driving-pulse signal DS exhibits a high level (see part (D) of FIG. 19) so that the transistor TR3 is set to be on.
Accordingly, in the pixel 23, a constant-current circuit based on the gate-source voltage Vgs, which corresponds to the potential difference across the signal-level holding capacitor C1, is formed by the transistor TR2 and the signal-level holding capacitor C1. The organic EL element 8 is caused to emit light in accordance with a drain-source current Ids, which is determined on the basis of the gate-source voltage Vgs. Thus, a reduction in the luminous intensity due to a change of the organic EL element 8 with time is prevented. The drain-source current Ids is represented by expression (1), which has been described with reference to FIG. 15. Hereinafter, transistors may be represented by symbols indicating switches.
Then, in the subsequent period T2, in the pixel 23, the transistors TR4 and TR5 are on, as shown in FIG. 21. Thus, in the pixel 23, the potentials at the ends of the signal-level holding capacitor C1 are set to the predetermined fixed potentials Vofs and Vss (see parts (E) and (F) of FIG. 19), and the drain-source current Ids corresponding to the gate-source voltage Vgs, which corresponds to a potential difference (Vofs−Vss) between the fixed potentials Vofs and Vss, flows from the transistor TR2 to the transistor TR5. During the period T2, in order not to cause the organic EL element 8 to emit light, because the potential difference across the organic EL element 8 becomes smaller than a threshold voltage Vthel of the organic EL element 8 and in order to cause the transistor TR2 to operate in a saturation region, the fixed potentials Vofs and Vss are set.
Then, in the pixel 23, during a predetermined period T3, the transistor TR5 is off, as shown in FIG. 22. Thus, in the pixel 23, the voltage at the end of the signal-level holding capacitor C1 closer to the transistor TR5 increases in accordance with the drain-source current Ids of the transistor TR2, as represented by a broken line of FIG. 22.
Here, as shown in FIG. 23, the organic EL element 8 can be represented by an equivalent circuit using a parallel circuit including a diode and a capacitor having a capacitance of Cel. Thus, in accordance with the drain-source current Ids of the transistor TR2, the source voltage Vs of the transistor TR2 gradually increases in the period T3, as shown in FIG. 24. As a result, in the pixel 23, the potential difference across the signal-level holding capacitor C1 is set to the threshold voltage Vth of the transistor TR2, and the terminal voltage at the end of the signal-level holding capacitor C1 closer to the transistor TR5 is set to a voltage (Vofs−Vth), which is obtained by subtracting the threshold voltage Vth of the transistor TR2 from the fixed potential Vofs. In this state, the anode potential Vel of the organic EL element 8 is represented by the expression Vel=Vofs−Vth. In the display device 21, the fixed potential Vofs is set so as to satisfy the expression Vel≦Vcat+Vthel, so that the organic EL element 8 does not emit light during the period T3.
Then, in the subsequent period T4, in the pixel 23, the transistors TR3 and TR4 are sequentially turned off, as shown in FIG. 25. Since the turning off of the transistor TR3 is performed prior to the turning off of the transistor TR4, a variation in the gate voltage Vg of the transistor TR2 can be suppressed. Then, in the pixel 23, the transistor TR1 is turned on. Thus, in a state where the terminal voltage at the end of the signal-level holding capacitor C1 closer to the transistor TR5 is set to the voltage (Vofs−Vth), the voltage at the end of the signal-level holding capacitor C1 closer to the transistor TR4 is set to the signal level Vsig of the signal line SIG.
In this case, the gate-source voltage Vgs of the transistor TR2 is accurately represented by expression (2). Here, “C2” represents the gate-source capacitance of the transistor TR2. However, since the parasitic capacitance Cel of the organic EL element 8 is larger than the capacitance of the signal-level holding capacitor C1 and the gate-source capacitance C2 of the transistor TR2, the gate-source voltage Vgs of the transistor TR2 can be set to the voltage (Vsig+Vth) with a sufficient accuracy.
                    Vgs        =                                            Cel                              Cel                +                                  C                  ⁢                                                                          ⁢                  1                                +                                  C                  ⁢                                                                          ⁢                  2                                                      ×                          (                              Vsig                -                Vofs                            )                                +          Vth                                    (        2        )            
Thus, in the pixel 23, the gate-source voltage Vgs of the transistor TR2 is set to the voltage (Vsig+Vth), which is obtained by adding the threshold voltage Vth to the signal level Vsig of the signal line SIG. Thus, in the display device 21, a variation in the luminous intensity that can be caused by a variation in the threshold voltage Vth, which is a characteristic of the transistor TR2, is prevented.
Then, in a predetermined period T5, in the pixel 23, the transistor TR1 is maintained on and the transistor TR3 is turned on, as shown in FIG. 26. Thus, in the pixel 23, the drain-source current Ids flows from the transistor TR2 in accordance with the gate-source voltage Vgs, which corresponds to the potential difference across the signal-level holding capacitor C1. At this time, if the source voltage Vs of the transistor TR2 is smaller than a voltage obtained by adding the threshold voltage Vthel of the organic EL element 8 and the cathode voltage Vcat and the current flowing to the organic EL element 8 is small, the source voltage Vs of the transistor TR2 gradually increases from the voltage Vs0 in accordance with the drain-source voltage Ids of the transistor TR2, as shown in FIG. 27. The voltage Vs0 is represented by expression (3).
                              Vs          ⁢                                          ⁢          0                =                  Vofs          -          Vth          +                                    Cel                              Cel                +                                  C                  ⁢                                                                          ⁢                  1                                +                                  C                  ⁢                                                                          ⁢                  2                                                      ×                          (                              Vsig                -                Vofs                            )                                                          (        3        )            
Here, the speed of the increase in the source voltage Vs depends on the mobility μ of the transistor TR2. As shown in FIG. 27, where “Vs1” represents a case of a large mobility and “Vs2” represents a case of a small mobility, the larger the mobility, the higher the speed of the increase in the source voltage Vs.
In the pixel 23, only in the period T5, the transistor TR3 is on while the transistor TR1 is maintained on. Thus, a variation in the luminous intensity that can be caused by a variation in the mobility, which is a characteristic of the transistor TR2, is prevented.
Then, in the pixel 23, the transistor TR1 is set to be off, and the organic EL element 8 is driven by the gate-source voltage Vgs, which is set by correcting the threshold voltage Vth and the mobility μ, as shown in FIG. 20. As a result, due to the turning off of the transistor TR1, the source voltage Vs of the transistor TR2 increases to a voltage at which the drain-source current Ids of the transistor TR2 is able to flow to the organic EL element 8. Thus, the organic EL element 8 starts emitting light. As a result, the gate voltage Vg of the transistor TR2 increases.
With the configuration shown in FIG. 18, a reduction in the luminous intensity that can be caused by a change of the organic EL element 8 with time is prevented. In addition, a variation in the luminous intensity that can be caused by a variation in a characteristic of the transistor TR2 is prevented.
However, with the configuration shown in FIG. 18, a signal line SIG, four scanning lines for control signals AZ2 and AZ1, a driving-pulse signal DS, and a write signal WS and four wiring patterns for fixed potentials Vcc, Vofs, Vss, and Vcat are provided for a single pixel 23. The wiring pattern for the fixed potential Vcat is formed by evaporating a metal film over the entire panel. Thus, even if a common scanning line is used for red, blue, and green pixels, wiring patterns for four scanning lines and wiring patterns for nine (3×3) fixed potentials are provided for a pixel group including a red pixel, a blue pixel, and a green pixel.
Thus, in a display device of the related art using N-channel transistors, the number of wiring patterns for scanning lines and for fixed potentials increases. In a case where the number of wiring patterns increases, it is difficult to efficiently arrange pixels with high densities. Thus, it is difficult to manufacture a high-precision display device with a high yield rate.